|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
may 2011 doc id 16913 rev 4 1/21 21 stb23nm50n, STF23NM50N stp23nm50n, stw23nm50n n-channel 500 v, 0.162 , 17 a to-220, to-220fp, to-247, d2pak mdmesh? ii power mosfet features 100% avalanche tested low input capacitance and gate charge low gate input resistance application switching applications description these devices are made using the second generation of mdmesh? technology. this revolutionary power mosfet associates a new vertical structure to the company?s strip layout to yield one of the world?s lowest on-resistance and gate charge. it is therefore suitable for the most demanding high efficiency converters. figure 1. internal schematic diagram order codes v dss (@tjmax) r ds(on) max. i d stb23nm50n 550 v < 0.19 17 a STF23NM50N stp23nm50n stw23nm50n 1 2 3 1 2 3 to-220fp to-220 1 2 3 to-247 1 3 d2pak ! - v $ ' 3 table 1. device summary order codes marking package packaging stb23nm50n 23nm50n d2pak tape and reel STF23NM50N to-220fp tu b e stp23nm50n to-220 stw23nm50n to-247 www.st.com
contents stb23nm50n, STF23NM50N, stp23nm50n, stw23nm50n 2/21 doc id 16913 rev 4 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 stb23nm50n, STF23NM50N, stp23nm50n, stw23nm50n electrical ratings doc id 16913 rev 4 3/21 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit to-220, d2pak to-247 to-220fp v ds drain-source voltage (v gs = 0) 500 v v gs gate- source voltage 25 v i d drain current (continuous) at t c = 25 c 17 17 (1) 1. limited only by maximu m temperature allowed a i d drain current (continuous) at t c = 100 c 11 11 (1) a i dm (2) 2. pulse width limited by safe operating area drain current (pulsed) 68 68 (1) a p tot total dissipation at t c = 25 c 125 30 w v iso insulation withstand voltage (rms) from all three leads to external heat sink (t=1 s;t c =25 c) 2500 v dv/dt (3) 3. i sd 17 a, di/dt 400 a/s, v ds peak v (br)dss , v dd = 80% v (br)dss peak diode recovery voltage slope 15 v/ns t stg storage temperature -55 to 150 c t j max. operating junction temperature 150 c table 3. thermal data symbol parameter value unit d2pak to-247 to-220 to-220fp r thj-case thermal resistance junction-case max 14.17c/w r thj-pcb (1) 1. when mounted on 1inch2 fr-4 board, 2 oz cu thermal resistance junction-pcb minimum footprint 30 c/w r thj-amb thermal resistance junction- ambient max 62.5 50 62.5 c/w t l maximum lead temperature for soldering purpose 300 c table 4. avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by tj max) 6a e as single pulse avalanche energy (starting tj = 25 c, i d = i ar , v dd = 50 v) 254 mj electrical characteristics stb23nm50n, STF23NM50N, stp23nm50n, stw23nm50n 4/21 doc id 16913 rev 4 2 electrical characteristics (t case =25 c unless otherwise specified) table 5. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 500 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, @125 c 1 100 a a i gss gate-body leakage current (v ds = 0) v gs = 25 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 8.5 a 0.162 0.19 table 6. dynamic symbol parameter test conditions min. typ. max. unit c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 50 v, f = 1 mhz, v gs = 0 - 1330 84 4.8 - pf pf pf c oss eq. (1) 1. c oss eq. is defined as a constant equi valent capacitance giving t he same charging time as c oss when v ds increases from 0 to 80% v ds equivalent output capacitance v gs = 0, v ds = 0 to 400 v - 210 - pf q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 400 v, i d = 17 a, v gs = 10 v, (see figure 18) - 45 7 24 - nc nc nc r g gate input resistance f=1 mhz gate dc bias=0 test signal level=20 mv open drain -4.6 - stb23nm50n, STF23NM50N, stp23nm50n, stw23nm50n electrical characteristics doc id 16913 rev 4 5/21 table 7. switching times symbol parameter test conditions min. typ. max. unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off-delay time fall time v dd = 250 v, i d = 17 a r g =4.7 v gs = 10 v (see figure 17) - 6.6 19 71 29 - ns ns ns ns table 8. source drain diode symbol parameter test conditions min typ. max unit i sd i sdm (1) 1. pulse width limited by safe operating area source-drain current source-drain current (pulsed) - 17 68 a a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 17 a, v gs = 0 - 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 17 a, di/dt = 100 a/s v dd = 60 v (see figure 22) - 286 3700 26 ns nc a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 17 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c (see figure 22) - 350 4800 27 ns nc a electrical characteristics stb23nm50n, STF23NM50N, stp23nm50n, stw23nm50n 6/21 doc id 16913 rev 4 2.1 electrical characteristics (curves) figure 2. safe operating area for to-220, d2pak figure 3. thermal impedance for to-220, d2pak figure 4. safe operating area for to-220fp figure 5. thermal impedance for to-220fp figure 6. safe operating area for to-247 figure 7. thermal impedance for to-247 ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v stb23nm50n, STF23NM50N, stp23nm50n, stw23nm50n electrical characteristics doc id 16913 rev 4 7/21 figure 8. output characteristics figure 9. transfer characteristics figure 10. normalized b vdss vs temperature figure 11. static drain-source on resistance figure 12. gate charge vs gate-source voltage figure 13. capacitance variations ) $ 6 $ 3 6 ! 6 6 6 ' 3 6 ! - v ) $ 6 ' 3 6 ! 6 $ 3 6 ! - v " 6 $ 3 3 4 * ? # n o r m ) $ m ! ! - v 2 $ 3 o n ) $ ! / h m 6 ' 3 6 ! - v 6 ' 3 1 g n # 6 6 $ $ 6 ) $ ! 6 $ 3 ! - v # 6 $ 3 6 p & |